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Vol: 47(61) No: 2 / June 2002 An Exploration-Based Binding and Scheduling Technique for Synthesis of Digital Blocks for Mixed-Signal Applications Hua Tang Department of Electrical and Computer Engineering State University of New York at Stony Brook, Stony Brook, NY, 11794-2350, USA, phone: ++1-631-632-1611, e-mail: htang@ece.sunysb.edu Alex Doboli Department of Electrical and Computer Engineering State University of New York at Stony Brook, Stony Brook, NY, 11794-2350, USA, e-mail: adoboli@ece.sunysb.edu, web: http://www.ece.sunysb.edu/~adoboli Keywords: high-level synthesis, operation scheduling, resource binding, performance models, mixed analog-digital systems. Abstract Design of mixed analog-digital systems requires new CAD tools as specific performance requirements need to be tackled i.e. simultaneous switching noise (SSN). This paper proposes a novel technique for resource binding and operation scheduling. Goal is to maximize the latency of the digital hardware such that its SSN is kept within feasible limits. The technique includes two steps: (1) for each input specifications, Performance Models (PM) are automatically generated for the overall throughput and SSN values, and (2) PMs are employed by an exploration algorithm to find the best resource binding and operation scheduling alternative. Experimental results showed the ability of the proposed technique to find good solutions as compared to traditional high-level synthesis methods. References [1] X. Aragones, J. L. Gonzales, A. Rubio, “Analysis and Solutions for Switched Noise Coupling in Mixed-Signal Ics”, Kluwer, 1999. [2] S. Bakshi, D. Gajski, “A Scheduling and Pipelining Algorithm for Hardware/Software Systems”, Proc. of ISSS, 1997, pp.113-118. [3] G. De Micheli, “Synthesis and Optimization of Digital Circuits”, McGraw-Hill, 1994. [4] A. Doboli, R. Vemuri, “A VHDL-AMS Compiler and Architecture Generator for Behavioral Synthesis of Analog Systems”, Proc. of DATE\'99, 1999, pp.338-345. [5] A. Doboli, A. Nunez, N. Dhanwada, S. Ganesan, R. Vemuri, “Behavioral Synthesis of Analog Systems using Two-Layered Design Space Exploration”, Proc. of DAC, 1999, pp.951-957. [6] C. H. Gebotys, M. I. Elmasry, “Simultaneous Scheduling and Allocation for Cost Constrained Optimal Architectural Synthesis”, Proc. of 28 th DAC, 1991. [7] S. Govindarajan, R. Vemuri, “Cone-Based Clustering Heuristic for List-Scheduling Algorithms”, Proc. of the ED & TC, 1997. [8] J. Nestor, G. Krishnamoorthy, “SALSA: A New Approach to Scheduling with Timing Constraints”, IEEE Trans. on CAD, May 1993. [9] P. G. Paulin, J. P. Knight, “Force Directed Scheduling for the Behavior Synthesis of ASICs”, IEEE Trans. on CAD, volume 8, June 1989, pp.661-679. [10] C. Reeves, “Modern Heuristic Techniques for Combinatorial Problems”, J. Wiley, 1993. [11] B. Stanisic, R. Rutenbar, R. Carley, “Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal Ics”, Kluwer, 1999. |